On Synthesizing Pass Transistor Networks

Premal Buch, Amit Narayan, A. Richard Newton, Alberto Sangiovanni-Vincentelli

Abstract

Pass transistor logic can be a promising alternative to static CMOS for deep sub-micron design. In this work, we motivate the need for CAD algorithms for pass transistor circuit design and show how BDDs have a natural correspondence to pass transistor networks. Decomposed BDDs are proposed as a suitable logic level representation for synthesis of pass transistor networks. Decomposed BDDs can be used to represent large, arbitrary functions and have a natural, efficient mapping to a pass transistor network due to the efficiency with which pass transistors can implement a multiplexer, the basic element of a BDD based circuit. This allows us to make logic level optimizations which can have a direct impact on area, power and performance of the final circuit implementation. Based on this decomposed BDD representation, we have proposed algorithms to construct pass transistor networks optimized for area, power and performance.

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