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Parameterized Systems-on-a-Chip
Abstract
Increasing silicon chip transistor capacities have enabled the integration
of complete digital systems, including microprocessors, memories, coprocessors
and peripherals, on a single chip. However, the number of transistors has
become so large and time-to-market constraints so small that designers
of embedded systems often can't utilize all those transistors. Thus, designers
are increasingly using pre-designed architectures, or programmable platforms,
to form all or part of a system. Such platforms must adapt to different
power, performance and size constraints found in different applications.
Parameterizing those platforms is one way to achieve such adaptability.
We demonstrate that a wide range of power/performance tradeoffs can be
obtained for a single application just by varying certain cache and bus
parameters, we describe an environment under development as part of UCR's
Dalton project intended to provide rapid power and performance evaluation
of large numbers of parameter configurations, and we point to the need
for research focus on parameterizing systems-on-a-chip platforms.
Presentation Slides
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