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Synthesis and Optimization of Domino LogicAbstractAlternatives to traditional static CMOS are becoming increasingly attractive for building fast circuits. In this talk, a synthesis and optimization flow for domino logic will be presented. Domino logic is a circuit family that provides several advantages, primarily in speed, but also has some disadvantages related to the added clocking complexity and unateness requirements on the circuit. The best choice for implementing a circuit would use a judicious mix of domino logic with static logic. Methods for automated partitioning between static and domino logic, technology mapping for domino logic, and timing optimization will be discussed, and results on benchmark circuits will be presented.Related Materials: |