Schedule Spring '95

1/18: Stephen Edwards, UC Berkeley sedwards@eecs.berkeley.edu

"An Introduction to Tcl/Tk" Abstract

1/25: Allen Emerson, UT Austin emerson@cs.utexas.edu

"Utilizing Symmetry when Model Checking: an Automata-theoretic Approach" Abstract

2/1: David Dill, Stanford dill@cs.stanford.edu

"Hierarchical Models of Synchronous Circuits" Abstract

2/8: Masahiro Fujita, masahiro@ic.eecs.berkeley.edu

"Logic Verification and Synthesis with Temporal Logic" Abstract

2/15: Medhi Hatamian, Silicon Design Experts, Inc. mh@sde.com

"A Design Environment for Multi-Million Transistor Chip Design: Created by Designers for Designers" Abstract

2/22: Forrest Brewer, UC Santa Barbara forrest@nimbus.ece.ucsb.edu

"New Results in BDD-Based Scheduling" Abstract

3/1: Vijay Saraswat, Xerox PARC saraswat@parc.xerox.com

"Computing with Continuous Change" Abstract

3/7 (TUESDAY): Alberto Sangiovanni-Vincentelli, UC Berkeley alberto@ic.eecs.berkeley.edu

"Software Synthesis for Hardware/Software Co-design of Embedded Systems" Abstract

3/15: Alice Parker, USC parker@cs.usc.edu

"System-Level Design Automation: The Unified System Construction Project" Abstract

3/22: Tom Henzinger, Cornell tah@cs.cornell.edu

"Computer-Aided Verification of Infinite-State Systems" Abstract

3/29: No seminar due to spring break

4/5: Dave Patterson, UC Berkeley pattrsn@cs.berkeley.edu

"A Case for NOW" Abstract

4/12: Raul Camposano, Synopsys raul@synopsys.com

"Higher Level Design Tools" Abstract

4/19: Jacob White, MIT white@rle-vlsi.mit.edu

"How Matrix-Free Iterative Methods Have Changed Computer Simulation of Circuits, Devices, Interconnect, and Micro-Electro-Mechanical Systems" Abstract

4/26: Tom Parks, UC Berkeley parks@eecs.berkeley.edu

"Dataflow Process Networks" Abstract

5/3: Antun Domic, Cadence domic@cadence.com

"Some problems in submicron technology and their effect on design methods and CAD tools" Abstract

5/5: Georges Gielen, KU-Leuven gielen@esat.kuleuven.ac.be

"Research Developments in Analog CAD at KU-Leuven" Abstract

5/10: Stan Liao, MIT syliao@rle-vlsi.mit.edu

"Code Generation and Optimization for Embedded DSP Processors" Abstract

5/12: Mark Greenstreet, University of British Columbia mrg@cs.ubc.ca

"Finite State Machines and Differential Equations: Using dynamical Systems Theory to Understand VLSI Circuits" Abstract

5/17: Carl Sechen, Universty of Washington sechen@ee.washington.edu

"Symbolic Analysis for Large Analog ICs" Abstract

6/2 (10:30AM): Ed Clarke, CMU emc@cs.cmu.edu

Abstract

6/16 (2:00PM): K. Lampaert, KU Leuven

Abstract

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