Dynamic Power Management of VLSI Systems


Abstract

Dynamic power management is a design methodology aiming at controlling performance and power levels of digital circuits and systems, with the goal of extending the autonomous operation time of battery-powered systems, providing graceful performance degradation when supply energy is limited, and adapting power dissipation to satisfy environmental constraints.

This talk surveys dynamic power management applied at the system level. We analyze first idleness detection and shutdown mechanisms for idle hardware resources. Next, we review system-level modeling techniques, and describe stochastic models for the power/performance behavior of systems. We describe a method for determining optimum control policies and we discuss the validity of the underlying assumptions. Last we review industrial standards for operating system-based power management, and implementation strategies for power management policies.


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