High-Speed High-Accuracy Interconnect Extraction Using a 3D Field Solver

Abstract

The design of modern integrated circuits is dominated by the delay due to interconnects. As a result of the 3D interconnects, signal delay problems and cross-talk problems are so severe that chips are late to market as well as much slower than designed due to inadequate CAD tools. Existing interconnect CAD tools fail since they do not provide a high-accuracy high-speed solution. Standard library-based tools are poor-accuracy high-speed while field solvers are high-accuracy low-speed.

Only by numerically solving the PDEs describing the electrostatic fields can an accurate representation of the deep submicron interconnects and substrate be obtained. Coyote's cad software AutoIC utilizes the world's fastest 3D field solver to provide high-speed high-accuracy interconnect and substrate simulations. AutoIC generates meshed models directly from GDSII layouts, and calculates lumped and distributed RC values using the multipole accelerated boundary element method. Arbitrary geometries, arbitrary boundary conditions, and arbitrary materials are supported. AutoIC is as fast as "high accuracy" pattern matchers, while providing the accuracy of a 3D field solver. Several live demos will be presented of critical cell, critical block, and critical net extraction.

Presentation slides can be found here.

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