Dr. Yatin Hoskote

Dr. Yatin Hoskote received his B.Tech. in Electrical Engineering from the Indian Institute of Technology Bombay India in 1989. He received a Masters and Ph.D. in Computer Engineering from the University of Texas at Austin in 1991 and 1995 respectively.

He is currently a researcher at the Strategic CAD Labs, Intel, Oregon. His interests lie in verification coverage measurement, automatic test generation, high level modeling and formal verification.

Email address: yatin.hoskote@intel.com