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Behavioral Models of Analog RF blocks for High-level Simulation and Optimization of Circuits and Systems

Fernando De Bernardinis, University of California at Berkeley
Cong Liu, University of California at Berkeley
Alberto L. Sangiovanni-Vincentelli, University of California at Berkeley

The analog bottleneck is becoming an urgent problem in the design of embedded communicating
systems. While top top-down, constraint-driven methodologies for analog design [1] have been
proposed for a long time, the lack of proper links between the analog models used at various
design staes and silicon implementations has made the application of the methodology somewhat
cumbersome. The design of analog/RF blocks is recognized to be too complex to be carried out in a
completely top-down manner. Therefore, in our previous and present work, we assume that
different architectures agt the block level are created and investigated by analog designers.
Starting from each architectural block, we derive a set of high-level models that abstract basic
design parameters (e.g., device sizes and bias) and provide a characterization of the behaviour
of the blocks in terms of a set of (achievable) performances. We want to create a hierarchy of
levels of abstraction that provide a means of mapping high-level constraints (such as BER or
blocking profiles) to circuit-level decisions.
To be able to do so, we adopt a mixed top-down bottom-up approach. Each leaf cell (block) is
assumed to be part of a library of blocks (IPs), but apart from the architecture itself none of
the block parameters are fixed (W, L, Ibias, etc.). The model we want to develop captures the
performance that can be obtained from the block when the design parameters span a given region of
the parameter space (feasible region), thus establishing the bottom-up link in a top-down flow.
More specifically, a relation is built on high-level parameters as the image in the performance
space of this feasible set. The relation may be built by sampling circuit performances at
different points in the architecture space and building multidimensional interpolations to
represent them. The reference model can be a mix of Spice netlists and manually derived equations. The relationships among different performance figure of each block can be efficiently represented using support vector machines. This allows to have a controlled multidimensional interpolation that, together with experimental design techniques, should help keeping the cost of model generation reasonable. The first level of the hierarchy of models is
assumed to be a detailed continuous time model matching a given architectural block. Going up in
the hierarchy some peculiarities fade away leaving more general models for functional blocks but
still with links to implementations. With this approach, for example, it will be possible to
refine a mixer in a receiver operating proper selection between several architectural choices.
Finally, composability of these models will be studied in terms of how to characterize the mutual
dependencies of different interconnections and consider their effects in the composed block
performances. In analogy to what has been done in the communication-based design paradigm for
digital design, we will address how to adapt interfaces and check compatibility between block connections. This is crucial to achieve model composability, so that higher-level models can be easily generated from detailed models. Some Berkeley Wireless Research Center design will be used to develop new models and find ways to
abstract models and parameter spaces to allow extensive design exploration and optimization of analog systems.

Publications:
H. Chang, E. Charbon, U. Choudhuri, A. Demir, E. Felt, E. Liu, E. Malavasi, A. L.
Sangiovanni-Vincentelli, and I. Vassiliou, A Top-Down Constraint-driven Methodology for Analog
Integrated Circuits, Kluwer Academic Publishers, Boston/Dordrecht/London, 1997.

E. Malavasi, U. Choudhury and A. Sangiovanni-Vincentelli, A Routing Methodology for Analog Integrated Circuits , In Proc. International Conference on Computer Aided Design, pages 202-205, Santa Clara, November 1990.

E. Malavasi, E. Charbon, G. Jusuf, R. Totaro and A. Sangiovanni-Vincentelli, Virtual Symmetry Axes for the Layout of Analog IC's , In Proc. ICVC, pages 195-198, Seoul, Korea, October 1991 

E. Liu, A. Sangiovanni-Vincentelli, G. Gielen and P. Gray, A Behavioral Representation for Nyquist Rate A/D Converters , In Proc. International Conference on Computer Aided Design, pages 386-389, Santa Clara, November 1991.

H. Chang, A. Sangiovanni-Vincentelli, F. Balarin, E. Charbon, U. Choudhury, G. Jusuf, E. Liu, E. Malavasi, R. Neff and P. Gray, A Top-down, Constraint-Driven Design Methodology for Analog Integrated Circuits, In Proc. Custom Integrated Circuit Conference, pages 841-846, Boston, May 1992. 

E. Charbon, E. Malavasi, U. Choudhury, A. Casotto and A. Sangiovanni-Vincentelli, A Constraint-Driven Placement Methodology for Analog Integrated Circuits , In Proc. Custom Integrated Circuit Conference, pages 2821-2824, Boston, May 1992 

E. Liu and A. Sangiovanni-Vincentelli, Behavioral Representations for VCO and Detectors in Phase-Lock Systems, In Proc. Custom Integrated Circuit Conference, pages 1231-1234, Boston, May 1992

E. Liu, G. Gielen, H. Chang, A. Sangiovanni-Vincentelli and P. Gray, Behavioral Modeling and Simulation of Data Converters , In Proc. International Symposium on Circuits and Systems, pages 2144-2147, San Diego, May 1992

E. Felt, E. Charbon, E. Malavasi and A. Sangiovanni-Vincentelli, An Efficient Methodology for Symbolic Compaction of Analog IC's with Multiple Symmetry Constraints, In Proc. EuroDAC, pages 148-153, Hamburg, Germany, September 1992 

P. Xiao, E. Charbon, A. Sangiovanni-Vincentelli, T. van Duzer and S. Whiteley, INDEX: An Inductance Extractor for Superconducting Circuits , In Proc. Applied Superconducting Conference, Chicago, August 1992

E. Liu and A. Sangiovanni-Vincentelli, Behavioral Simulation for Noise in Mixed-Mode Sampled-Data Systems , In Proc. International Conference on Computer Aided Design, pages 322-326, Santa Clara, November 1992.

E. Felt, E. Malavasi, E. Charbon and A. Sangiovanni-Vincentelli, Performance-Driven Compaction for Analog Integrated Circuits , In Proc. Custom Integrated Circuit Conference, pages 1731-1735, San Diego, May 1993 

E. Malavasi and D. Pandini, Optimum Stacked Layout for Analog CMOS IC's , In Proc. Custom Integrated Circuit Conference, pages 1711-1714, San Diego, May 1993 

E. Liu, H. Chang and A. Sangiovanni-Vincentelli, Analog System Verification in the Presence of Parasitics using Behavioral Simulation , In Proc. Design Automation Conference, pages 159-163, Dallas, June 1993

E. Charbon, E. Malavasi and A. Sangiovanni-Vincentelli, Generalized Constraint Generation for Analog Circuit Design, In Proc. International Conference on Computer Aided Design, pages 408-414, Santa Clara, November 1993 

E. Liu and A. Sangiovanni-Vincentelli, Nyquist Data Converter Testing and Yield Analysis using Behavioral Simulation, In Proc. International Conference on Computer Aided Design, pages 341-348, Santa Clara, November 1993

E. Charbon, E. Malavasi, D. Pandini and A. Sangiovanni-Vincentelli, Imposing Tight Specifications on Analog IC's Through Simultaneous Placement and Module Optimization, In Proc. Custom Integrated Circuit Conference, pages 525-528, San Diego, May 1994 

H. Chang, E. Liu, R. Neff, E. Felt, E. Malavasi, E. Charbon, A. Sangiovanni-Vincentelli and P. R. Gray, Top-Down, Constraint-Driven Methodology Based Generation of n-bit Interpolative Current Source D/A Converters, In Proc. Custom Integrated Circuit Conference, pages 369-372, San Diego, May 1994 

A. Demir, E. Liu, A. Sangiovanni-Vincentelli, and I. Vassiliou, Behavioral Simulation Techniques for Phase/Delay-Locked Systems, In Proc. Custom Integrated Circuit Conference, pages 453-456, San Diego, May 1994

E. Liu, W. Kao, E. Felt and A. Sangiovanni-Vincentelli, Analog Testability Analysis and Fault Diagnosis using Behavioral Modeling>, In Proc. Custom Integrated Circuit Conference, pages 413-416, San Diego, May 1994

E. Charbon, E. Malavasi, D. Pandini, A. Sangiovanni-Vincentelli, Simultaneous Placement and Module Optimization of Analog IC's, In Proc. Design Automation Conference, pages 31-35, San Diego, June 1994 

E. Felt and A. Sangiovanni-Vincentelli, Testing of Analog Systems Using Behavioral Models and Optimal Experimental Design Techniques, In Proc. International Conference on Computer Aided Design, pages 672-678, Santa Clara, November 1994

E. Felt, A. Narayan and A. Sangiovanni-Vincentelli, Measurement and Modeling of MOS transistor Current Mismatch in Analog IC's, In Proc. International Conference on Computer Aided Design, pages 272-277, Santa Clara, November 1994

A. Demir, E. Liu and A. Sangiovanni-Vincentelli, Time-Domain non-Monte Carlo Noise Simulation for Nonlinear Dynamic Circuits with Arbitrary Excitations , In Proc. International Conference on Computer Aided Design, pages 598-603, Santa Clara, November 1994

E. Charbon, G. Holmlund, B. Donecker, A. Sangiovanni-Vincentelli, A Performance-Driven Router for RF and Microwave Analog Circuit Design, in Proc. Custom Integrated Circuit Conference, pages 383-386, Santa Clara, May 1995 

E. Malavasi and A. Sangiovanni-Vincentelli, Dynamic Bound Generation for Constraint-Driven Routing, in Proc. Custom Integrated Circuit Conference, pages 477-480, Santa Clara, May 1995 

H. Chang, E. Felt, A. Sangiovanni-Vincentelli, Top-Down Design of a Sigma Delta Converter, in Proc. Custom Integrated Circuit Conference, pages 533-536, Santa Clara, May 1995

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