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Introduction
People Research
themes: Embedded Systems
Hybrid Systems
Deep Submicron
Logic Synthesis
Other links:
EE249
CHESS
GSRC
BWRC
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Substrate Noise Injection
Techniques are presented to compactly represent substrate noise
currents injected by digital networks.
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Using device-level simulation, every gate in a given library is
modeled by means of the signal waveform it injects into the substrate,
depending on its input transition scheme.
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For a given sequence of input vectors, the switching activity of
every node of the boolean network is computed. Assuming that
technology
mapping has been performed, each node corresponds to a gate in the
library, hence to a specific injection waveform.
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The noise contribution of each node is computed by convolving its
switching activity with the associated injection waveforms. The total
injected noise for the digital block is then obtained by
summing all the noise contributions in the circuit.
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The resulting injected noise can be viewed as a random process, whose
power spectrum is computed using standard signal processing
techniques.
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A study was performed on a number of standard benchmark circuits to
verify the validity of the assumptions and to measure the accuracy
of the obtained power spectra, as compared to the equivalent
substrate network obtained by full extraction and simulation.
Publications:
S. Zanella, A. Neviani, E. Zanoni, E. Charbon, P. Miliozzi, C. Guardiani, L. Carloni, and A. L.
Sangiovanni-Vincentelli,
Modeling of Substrate Noise Injected by Digital Libraries,
Proc. Int. Symp. Quality Electronic Design, San Jose, CA, March 2001.
E. Charbon, P. Miliozzi, L.P. Carloni, A. Ferrari and
A.L. Sangiovanni-Vincentelli,
Modeling Digital Substrate Noise Injection in Mixed-Signal ICs,
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 18, No. 3, March 1999.
P. Miliozzi, L.P. Carloni, E. Charbon and A.L. Sangiovanni-Vincentelli,
SubWave: a Methodology for Modeling Digital Substrate Noise Injection in Mixed-Signal ICs.
Proceedings of the IEEE 1996 Custom Integrated Circuit Conference.
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