Journal Articles

Alessandro Pinto, Luca P. Carloni and Alberto L. Sangiovanni Vincentelli, "A Methodology for Constraint-Driven Synthesis of On-Chip Communications", Accepted for publication, IEEE Transactions on Computer Aided Design.
Abstract: We present a methodology and an optimization framework for the synthesis of on-chip communication (OCC) by assembling components such as interfaces, routers, buses and links, from a target library. Models for functionality, cost, and performance of each element are captured in the library together with their composition rules. The methodology for the design of OCC is based on:

-a mathematical framework to model communication at different levels of abstraction from the point-to-point input specification to the library elements and the final implementation;

-the formulation of an optimization problem and a heuristic synthesis algorithms to solve it: given a set of communication requirements on the throughput and latency of the channels it returns a communication implementation that satisfies them while minimizing power consumption.

BibTeX:
	  @article{4_apint_tcad_noc_08,
	  author = {Alessandro Pinto and Luca P. Carloni and Alberto L. Sangiovanni Vincentelli},
	  title = {A Methodology for Constraint-Driven Synthesis of On-Chip Communications},
	  journal = {Submitted to IEEE Transactions on Computer Aided Design},
	  year = {2008}
	  }
	  
Alessandro Pinto, Luca P. Carloni and Alberto L. Sangiovanni Vincentelli, "COSI: A Framework for the Design of Interconnection Networks", IEEE Desing and Test of Computers, Vol. 25, No. 5, September/October 2008.
Abstract: The COmmunication Synthesis Infrastructure (COSI) framework, a public-domain design framework for the design exploration and synthesis of interconnection networks, is presented. The framework embodies a methodology based on the platform-based design principles. It is used to define specific interconnect design flows for a variety of applications from chips to systems. On-chip communication design is used in this paper as an example of how to use COSI for a specific application.
BibTeX:
	  @article{5_apinto_dnt_noc_08,
	  author = {Alessandro Pinto and Luca P. Carloni and Alberto L. Sangiovanni Vincentelli},
	  title = {COSI: A Framework for the Design of Interconnection Networks},
	  journal = {IEEE Desing and Test of Computers},
	  volume={25},
	  number={5},
	  year = {2008}
	  }
	  
Alessandro Pinto, Alvise Bonivento, Alberto L. Sangiovanni Vincentelli, Roberto Passerone and Marco Sgroi "System level design paradigms: Platform-based design and communication synthesis", ACM Transactions on Design Automation of Electronic Systems, New York, NY, USA Vol. 11(3), pp. 537-563. ACM.
Abstract: Embedded system level design must be based on paradigms that make formal foundations and unification a cornerstone of their construction. Platform-Based designs and communication synthesis are important components of the paradigm shift we advocate.

Communication synthesis is a fundamental productivity tool in a design methodology where reuse is enforced. Communication design in a reuse methodology starts with a set of functional requirements and constraints on the interaction among components and then proceeds to build protocols, topology, and physical implementations that satisfy requirements and constraints while optimizing appropriate measures of efficiency of the implementation. Maximum efficiency can be reached when the communication specifications are entered at high levels of abstraction and the design process optimizes the implementation from this specification. Unfortunately, this process is very difficult if it is not cast in a rigorous framework. Platform-Based design helps define a successive refinement process where each step can be carried out automatically and optimized appropriately. We present two cases, an on-chip and a wireless sensor network design, where the resulting methodology gave encouraging results.

BibTeX:
@article{2_apinto_toaes_pbd_06,
  author = {Alessandro Pinto and Alvise Bonivento and Allberto L. Sangiovanni-Vincentelli and Roberto Passerone and Marco Sgroi},
  title = {System level design paradigms: Platform-based design and communication synthesis},
  journal = {ACM Trans. Des. Autom. Electron. Syst.},
  publisher = {ACM},
  year = {2006},
  volume = {11},
  number = {3},
  pages = {537--563},
  doi = {http://doi.acm.org/10.1145/1142980.1142982}
}

Conference Articles

Alessandro Pinto, Massimiliano D'Angelo, Carlo Fischione, Eelco Scholte and Alberto L. Sangiovanni Vincentelli, "Synthesis of Embedded Networks for Building Automation and Control", In Proc. of American Control Conference (ACC 08), Seattle, Washington,., June, 2008.
Abstract: We present a methodology and a software framework for the automatic design exploration of the communication network among sensors, actuators and controllers in building automation systems. Given 1) a set of end-to-end latency, throughput and packet error rate constraints between nodes, 2) the building geometry, and 3) a library of communication components together with their performance and cost characterization, a synthesis algorithm produces a network implementation that satisfies all end-to-end constraints and that is optimal with respect to installation and maintenance cost. The methodology is applied to the synthesis of wireless networks for an essential step in any control algorithm in a distributed environment: the estimation of control variables such as temperature and air-flow in buildings.
BibTeX:
@inproceedings{PintoDAngeloFischioneScholteSangiovanniVincentelli08_SynthesisOfEmbeddedNetworksForBuildingAutomationControl,
  author = {Alessandro Pinto and Massimiliano D'Angelo and Carlo Fischione and Eelco Scholte and Alberto Sangiovanni-Vincentelli},
  title = {Synthesis of Embedded Networks for Building Automation and Control},
  booktitle = {Proc. of American Control Conference (ACC 08), Seattle, Washington,},
  year = {2008},
  url = {http://chess.eecs.berkeley.edu/pubs/467.html}
}
Carloni, L., Kahng, A., Muddu, S., Pinto, A., Samadi, K. & Sharma, P. (2008), "Interconnect Modeling for Improved System-Level Design Optimization", In Asia and South Pacific Design Automation Conference., January, 2008.
Abstract: Accurate modeling of delay, power, and area of interconnections early in the design phase is crucial for effective system-level optimization. Models presently used in system-level optimizations, such as network-on-chip (NoC) synthesis, are inaccurate in the presence of deep-submicron effects. In this paper, we propose new, highly accurate models for delay and power in buffered interconnects; these models are usable by system-level designers for existing and future technologies. We present a general and transferable methodology to construct our models from a wide variety of reliable sources (Liberty, LEF/ITF, ITRS, PTM, etc.). The modeling infrastructure, and a number of characterized technologies, are available as open source. Our models comprehend key interconnect circuit and layout design styles, and a power-efficient buffering technique that overcomes unrealities of previous delay-driven buffering techniques. We show that our models are significantly more accurate than previous models for global and intermediate buffered interconnects in 90 nm and 65 nm foundry processes - essentially matching signoff analyses. We also integrate our models in the COSI-OCC synthesis tool and show that the more accurate modeling significantly affects optimal/achievable architectures that are synthesized by the tool. The increased accuracy provided by our models enables system-level designers to obtain better assessments of the achievable performance/power/area tradeoffs for (communication-centric aspects of) system design, with negligible setup and overhead burdens.
BibTeX:
@inproceedings{CarloniKahngMudduPintoSamadiSharma08,
  author = {Luca Carloni and Andrew Kahng and Swamy Muddu and Alessandro Pinto and Kambiz Samadi and Puneet Sharma},
  title = {Interconnect Modeling for Improved System-Level Design Optimization},
  booktitle = {Asia and South Pacific Design Automation Conference},
  year = {2008},
  url = {http://www.gigascale.org/pubs/1170.html}
}
Alessandro Pinto, Luca P. Carloni and Alberto L. Sangiovanni-Vincentelli, "A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and Its Application to Building Automation and Control", In Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.., October, 2007.
Abstract: In networked control systems the controller of a physically distributed plant is implemented as a collection of tightly interacting, concurrent processes running on a distributed execution platform. The execution platform consists of a set of heterogeneous components (sensors, actuators, and controllers) that interact through a hierarchical communication network. We propose a methodology and a framework for design exploration and automatic synthesis of the communication network. We present how our approach can be applied to the design of control systems for intelligent buildings. The input specification of the control system includes (i) the constraints on the location of its components, which are imposed by the plant, (ii) the communication requirements among the components, and (iii) an estimation of the real-time constraints for the correct behavior of the algorithms implementing the control law. The output produces an implementation of the control networks that is obtained by combining elements from a pre-defined library of communication links, protocols, interfaces, and switches. The implementation is optimal in the sense that it satisfies the given specification while minimizing an objective function that captures the overall cost of the network implementation.
BibTeX:
@inproceedings{PintoCarloniSangiovanniVincentelli07,
  author = {Alessandro Pinto and Luca Carloni and Alberto Sangiovanni-Vincentelli},
  title = {A Communication Synthesis Infrastructure for Heterogeneous Networked Control Systems and Its Application to Building Automation and Control},
  booktitle = {Proceedings of the Seventh International Conference on Embedded Software (EMSOFT), 2007.},
  year = {2007},
  url = {http://www.gigascale.org/pubs/1037.html}
}
Alessandro Pinto, Luca P. Carloni, and Alberto L. Sangiovanni-Vincentelli, "Efficient synthesis of networks on chip", In Proc. 21st International Conference on Computer Design. , pp. 146-150.
Abstract: We propose an efficient heuristic for the constraint-driven communication synthesis (CDCS) of on-chip communication networks. The complexity of the synthesis problems comes from the number of constraints that have to be considered. In this paper we propose to cluster constraints to reduce the number that needs to be considered by the optimization algorithm. Then a quadratic programming approach is used to solve the communication synthesis problem with the clustered constraints. We provide an analytical model that justifies our choice of the clustering cost function and we discuss a set of experiments showing the effectiveness of the overall approach with respect to the exact algorithm.
BibTeX:
@inproceedings{Pinto2003b,
  author = {Pinto, A. and Carloni, L.P. and Sangiovanni-Vincentelli, A.L.},
  title = {Efficient synthesis of networks on chip},
  booktitle = {Proc. 21st International Conference on Computer Design},
  year = {2003},
  pages = {146--150},
  doi = {http://dx.doi.org/10.1109/ICCD.2003.1240887}
}
Alessandro Pinto, Luca P. Carloni and Alberto L. Sangiovanni-Vincentelli, "Constraint-driven communication synthesis", In Proc. 39th Design Automation Conference. , pp. 783-788.
Abstract: Constraint-driven communication synthesis enables the automatic design of the communication architecture of a complex system from a library of pre-defined intellectual property (IP) components. The key communication parameters that govern all the point-to-point interactions among system modules are captured as a set of arc constraints in the communication constraint graph. Similarly, the communication features offered by each of the components available in the IP communication library are captured as a set of feature resources together with its cost figures. Then, every communication architecture that can be built using the available components while satisfying all constraints is implicitly considered (as an implementation graph matching the constraint graph) to derive the optimum design solution with respect to the desired cost figure. The corresponding constrained optimization problem is efficiently solved by a novel algorithm that is presented here together with its rigorous theoretical foundations
BibTeX:
@inproceedings{Pinto2002a,
  author = {Pinto, A. and Carloni, L.R. and Sangiovanni-Vincentelli, A.L.},
  title = {Constraint-driven communication synthesis},
  booktitle = {Proc. 39th Design Automation Conference},
  year = {2002},
  pages = {783--788},
  doi = {http://dx.doi.org/10.1109/DAC.2002.1012729}
}

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