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Kaushik RavindranBio:Kaushik Ravindran is a PhD student in the EECS Department at the University of California, Berkeley. His research interests include design approaches for FPGA platforms and optimization techniques for multiprocessor design space exploration. Kaushik has a BS in Computer Engineering from the Georgia Institute of Technology. He is a student member of IEEE.Abstract:To realize high performance, embedded applications are deployed on multiprocessor platforms tailored for an application domain. However, when a suitable platform is not available, only few application niches can justify the increasing costs of an IC product design. An alternative is to design the multiprocessor on an FPGA. FPGA-based soft multiprocessors allow the user to customize the number of processors, interconnect schemes, memory hierarchy and peripheral support. This retains the programmability advantage, while obviating the risks in producing silicon. This also opens FPGAs to the world of software designers. The main objectives of this work are the following: (i) Demonstrate that soft multiprocessors on FPGAs can be competitive with HDL implementations, and (ii) Develop an automated path to design efficient soft multiprocessors with hundreds of processors for a target application. To address the first objective, we evaluate the performance of soft multiprocessors for popular network applications (IPv4 packet forwarding and DSLAM) and compare them to other HDL and network processor implementations. However, as FPGAs increase in capacity, they continue to accommodate more processors and complex communication networks. To systematically explore the design space of soft multiprocessors for a target application, we develop an automated exploration framework to determine efficient micro-architectures, task allocations and data layouts. Our main contribution is an optimization approach based on Integer Linear Programming and specialized heuristics to allocate application tasks and states to maximize throughput. Links: |
