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Will Plishker

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Bio:

William Plishker is presently working towards a Ph.D. in Electrical Engineering at the University of California, Berkeley. His research interests include design automation techniques for programmable embedded systems. In 2000, he received his B.S. degree in Computer Engineering from the Georgia Institute of Technology. He is a member of IEEE.

Abstract:

Application specific programmable systems are capable of high performance implementations while remaining flexible enough to support a range of applications. Architects of these systems achieve high performance through domain specific optimizations such as multiple programmable elements, dedicated logic, and specialized memory and interconnection. However, these features are often introduced at the expense of programming productivity. For application specific programmable systems to succeed, programmers must be able to deliver high performance implementations quickly. We examine one of the most performance critical, time consuming, manual steps to arriving at efficient implementations on these platforms: the mapping of an application to the target architecture. To accelerate this step, we construct a model of the architecture which captures its key features, while being amenable to automated mapping. We construct an analogous representation of the application which may be mapped to the architectural model. We formulate this as an integer linear programming (ILP) problem, which considers the computation, data, and communication aspects of the mapping problem simultaneously. We demonstrate this approach using a common high performance networking multiprocessor, the Intel's network processor line the IXP2xx series. This method finds optimal solutions with respect to these models with and produces high performance implementations on representative network applications.

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