Multiprocessor Architecture Watch
Concurrency Abstraction Watch

Architecture Development and Deployment


Overview Tutorial

The Mescal Architecture Development System (Tipi) Tutorial, M. Gries, S. Weber, C. Brooks, Electronics Research Lab, University of California at Berkeley, UCB/ERL M03/40, October, 2003

The MESCAL architecture development framework is called Tipi (spelled Teepee in earlier publications). Tipi is designed as a successor to architecture description languages (ADLs). ADLs of the past focused on modeling the structure or the instruction set semantics of an architecture. MIMOLA[1] is an example of a structural ADL. Instruction set ADLs include ISDL[2] and nML[3]. A current trend in ADLs is to combine the description of the structure and the instruction set semantics. Combined ADLs include EXPRESSION[4] and LISA[5]. One key aspect of these solutions is that restrictions on the flexibility of the architecture are used to manage the complexity of tool (compiler and/or simulator) generation. Verifying that the architecture, compiler, and simulator are consistent after adding new features is complex and not well defined. The existing solution is to use a single syntax to describe the restricted space of architectures at all points in the design flow. If one wishes to relax the restrictions on the architecture, then the problems of consistency and tool generation become intractable. The underlying issue is that architects, compiler designers, and simulator writers are concerned with dissimilar and disjoint facets of the architecture, but must find some way to keep these disparate facets consistent.

The Multiple Views Approach

The proposed solution to this problem is to maintain a single, simple, formal description of the architecture with an extremely minimal set of restrictions on the design space. This allows a very broad class of architectures to be described. A view of this model is an abstraction that encapsulates the information required by a facet of the architecture. Each view is implemented with a synonymous tool in the Tipi framework for interacting with the architecture using the corresponding abstraction. Correctly implemented views do not introduce semantics not present in the model, and thus are consistent with the model by construction. For more technical background and a case study, see the design flow described in [6][8][9].In order to learn how Tipi is embedded in the Mescal framework, see the overview article in [7].

Views for Architecture Development

Views for Architecture Deployment



R. Leupers and P. Marwedel, "Retargetable Code Generation based on Structural Processor Descriptions," Design Automation for Embedded Systems, vol. 3, no. 1, Jan 1998, pp.1-36.


G. Hadjiyiannis, S. Hanono and S. Devadas, "ISDL: An Instruction Set Description Language for Retargetability," Proc. 34th Design Automation Conference (DAC 97), Anaheim, CA., June 1997, pp. 299-302.


A. Fauth, J. Van Praet and M. Freericks, "Describing Instruction Set Processors Using nML," Proc. European Design and Test Conference, Paris, France, Mar. 1995, pp. 503-507.


A. Halambi et al., "Expression: A Language for Architecture Exploration through Compiler/Simulator Retargetability," Proc. Design Automation and Test in Europe (DATE 99), Mar. 1999, Munich, Germany, 485-490.


S. Pees et al., "LISA-Machine Description Language for Cycle-Accurate Models of Programmable DSP Architectures," Proc. 36th Design Automation Conference (DAC 99), New Orleans, LA., June 1999, pp. 933-938.

S. J. Weber, M. W. Moskewicz, M. Loew, and K. Keutzer, Multi-View Operation-Level Design -- Supporting the Design of Irregular ASIPs, University of California, Berkeley, UCB/ERL M03/12, April, 2003
A. Mihal, C. Kulkarni, C. Sauer, K. Vissers, M. Moskewicz, M. Tsai, N. Shah, S. Weber, Y. Jin, K. Keutzer, S. Malik, A Disciplined Approach to the Development of Architectural Platforms, 6-16, 19, IEEE Design and Test of Computers, 2002
S. J. Weber, M. W. Moskewicz, M. Gries, C. Sauer, K. Keutzer, Fast Cycle-Accurate Simulation and Instruction Set Generation for Constraint-Based Descriptions of Programmable Architectures, Int. Conference on Hardware/Software Codesign (CODES), September, 2004
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