Electronic Systems Design Seminar


Efficient Software Realization of Sequential Machines

Yunjian Jiang
UC Berkeley

ESD & Dissertation Seminar talk
Monday, November 24th, 2003, 4 - 5pm
540A/B Cory Hall (D.O.P. Center Classroom)


In this talk we present a design methodology for embedded control systems, which starts from high-level synchronous specifications and produces implementations in hardware and software for embedded platforms. It includes design modeling using Extended Finite State Machines (EFSM), technology independent logic optimization using control and data-path don't cares, performance driven hardware/software partitioning, and code generation. A main component of the tool flow is the software realization of EFSMs. In this regard, we introduce the notion of generalized cofactoring for multi-valued relations, which is a generalization of traditional functional simulation methods with logic equations, Binary Decision Diagrams (BDD), sum-of-products and table look-ups. This leads to the discovery of an information theoretic approach for logic simulation, where source coding techniques are applied to functional simulation by using entropy as a complexity measure for multi-valued relations. We will also briefly describe the MVSIS project, which is a software system currently being developed for logic optimization of multi-valued non-deterministic sequential networks.


Yunjian Jiang is a Ph.D. candidate in the department of Electrical Engineering and Computer Science, UC Berkeley. He received his B. Eng. degree from Tsinghua University, Beijing, in 1998, and his M. S. degree from UC Berkeley in 2000. He has interned for companies such as Magma Design Automation, Cadence Design Systems, Teja Technologies, and IBM T. J. Watson Research Center.

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