The Biggascale Emulation Engine


Abstract

A new project has begun at the Berkeley Wireless Research Center to build a hardware emulator for next generation communication ICs. The so-called "Biggascale Emulation Engine" will be a large array of Field Programmable Gate Arrays (FPGAs) and possibly Digital Signal Processors (DSPs). Considerations that led to the emulator approach will be reviewed, as well as some results of an earlier effort at Lucent Technologies to build an FPGA array for communication signal processing. Ways to integrate the emulator into the BWRC design flow will be described.


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