Modeling and Design of RLC Interconnects
The talk starts with an overview of ongoing projects at EDA lab, University of Wisconsin, including interconnect design and planning, and power-efficient computer architecture. Then, more details will be given for two pieces of work related Ghz+ interconnect design: an efficient inductance model, and a min-area simultaneous shield insertion and net ordering solution for RLC signal integrity.
|You are not logged in|
|©2002-2017 U.C. Regents|