Dr. Jin Yang


Jin Yang is currently a senior staff research engineer in Intel Strategic CAD Labs in the area of formal verification research. His main interest is in developing and applying practical formal verification technologies. He received his Ph.D. degree in Computer Science from the University of Texas at Austin in November 1997 where his research interest was on the formal specification and verification of hard real time systems.

Email: jinyang@ichips.intel.com


You are not logged in 
Contact 
©2002-2017 U.C. Regents