Electronic Systems Design Seminar
http://embedded.eecs.berkeley.edu/esd-seminar

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Transaction-Level Modeling with SystemC

Dr. Stan Liao
Synopsys Advanced Technology Group

Monday, May 6, 2002, 1:00pm-2:00pm
540AB Cory Hall (DOP Center Classroom)

Abstract

Recently there has been a growing interest in platform-based design as a methodology for coping with time-to-market pressure and the rising cost of semiconductor manufacturing. In platform-based design, emphasis is on the reuse of components at all levels of abstraction. To enable platform-based design, an environment that allows models at various levels of abstraction to simulate together is a must. SystemC provides such an environment, and is gaining in popularity.

In this talk I will give an overview of the new features introduced in SystemC 2.0 that are aimed at system-level design. Then I will focus on a new modeling technique called transaction-level modeling. This is a powerful technique that allows the designer easily to model the communication infrastructure, and to experiment with and evaluate different communication architectures. By way of a simple bus example, I will demonstrate the key ideas in transaction-level modeling and how it can be used for accurate performance estimation even at an abstract level, where fast simulation speed makes design exploration more effective.

Speaker

Stan Liao received his PhD from MIT (under Prof. Srinivas Devadas) in 1996 and has since then been with Synopsys, where he is now a principal engineer in the Advanced Technology Group. He was involved in the development of SystemC, and made major contributions to its design and implementation. He recently coauthored the book "System Design with SystemC".

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