Electronic Systems Design Seminar
http://www-cad.eecs.berkeley.edu/esd-seminar


Andreas Herkersdorf    

A Modular System-on-chip Platform
for Network Processing

Dr. Andreas Herkersdorf
Manager Networking Hardware
IBM Research Zürich - Switzerland

Monday, May 5th, 2003, 4:00pm - 5:00pm
540AB Cory Hall (DOP Center Classroom)


Abstract

Network processors are programmable VLSI components which will play a key role in next generation Internet packet-switch-routers, mobile and wire line broadband access equipment, and network edge gateways. The powerful mix of software programmable processor cores with communications-specific hardware assists makes network processors attractive to equipment vendors in order to differentiate their products from competition. This mix provides, on the one hand side, the necessary flexibility to support new, emerging applications, and on the other hand, the "wire-speed" performance of conventional ASIC approaches. In the High-Speed Networking group at the IBM Zurich Research Laboratory, we are developing an architectural framework for scalable and modular network SoC (System-on-chip) solutions.

In my talk, I will briefly describe current trends in data networking and show how this evolution drives the demand for a new class of VLSI components called network processors. After reviewing network processor performance requirements and an overview on architectures of existing network processors, I will introduce our modular, platform-based SoC approach to network processing. Constitutional elements of the architecture are: A multi-processor complex consisting of general purpose embedded RISC cores, a high-speed on-chip interconnect network, an on-off-chip memory hierarchy for control state and packet data, and service-specific functional ingress / egress dataflow pipelines. I will motivate the value proposition of SoC-based network processor solutions and discuss design challenges inherent to this approach.

Speaker

Andreas Herkersdorf received a Dipl.-Ing. degree in Electrical Engineering from the Technical University of Munich, Germany, in 1987, and a Ph.D. in Electrical Engineering from the Swiss Federal Institute of Technology (ETH) in Zurich, Switzerland, in 1991. Since 1988, he has been with the IBM Zurich Research Laboratory, Switzerland, where he currently manages the Networking Hardware group. His areas of interest are high-speed communication networks and systems, platform-based System on chip design methodology, and reconfigurable computing systems.





You are not logged in 
Contact 
©2002-2017 U.C. Regents