EECS 298-11: CAD Seminar
Wednesday, April 24, 1996, 5pm
531 Cory Hall, Hogan Room



	         Verification of Cache-Coherent
              Shared-Memory Multiprocessor Systems
	
			Fong Pong
		Sun Microsystems Inc.

     The complexity of shared-memory multiprocessor systems continues
to increase due to the difficulty of providing the programmer with the
abstraction of a single shared memory while distributing the physical
memory across the processing nodes.  This is particularly true when
scalability and performance are concerned.

     Modern shared-memory systems use hardware optimizations such as
caches and store buffers to overcome the problem of long latency and to
provide high bandwidth for remote memory accesses.  Unfortunately,
these hardware optimizations cause data consistency and cache coherence
problems. To resolve them requires complex hardware and software
assistances, which are difficult to develop and prove correct.

    In this talk, I will present a hierarchical review of the problems
associated with consistency and coherence. This review is critical to
build correct verification models resolving these problems for
shared-memory systems. Verification methods applied to behavioral
models, system models and implementations will also be discussed.



Upcoming seminars:

April 26:  Peter Kopke, Cornell

May 1:     John Marren, Alex. Brown & Sons

May 8:     Ganesh Gopalakrishnan, Univ. of Utah

May 10 (Friday 11AM):	Dhiraj Pradhan, Texas A & M Univ.